diff --git a/litex/build/microsemi/common.py b/litex/build/microsemi/common.py
index f3c9d85c1..04fb9f8b0 100644
--- a/litex/build/microsemi/common.py
+++ b/litex/build/microsemi/common.py
@@ -14,12 +14,16 @@ class MicrosemiPolarfireAsyncResetSynchronizerImpl(Module):
         rst1 = Signal()
         self.specials += [
             Instance("DFN1P0",
-                i_D=0, i_PRE=~async_reset,
-                i_CLK=cd.clk, o_Q=rst1
+                i_CLK = cd.clk,
+                i_PRE = ~async_reset,
+                i_D   = 0,
+                o_Q   = rst1
             ),
             Instance("DFN1P0",
-                i_D=rst1, i_PRE=~async_reset,
-                i_CLK=cd.clk, o_Q=cd.rst
+                i_CLK = cd.clk,
+                i_PRE = ~async_reset,
+                i_D   = rst1,
+                o_Q   = cd.rst
             )
         ]