From 1366ff5e26731aa7fb7d8264d35c42729d57bce4 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 28 Feb 2015 11:45:21 +0100 Subject: [PATCH] move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future) --- misoclib/others/__init__.py | 0 misoclib/{ => others}/mxcrg/__init__.py | 0 misoclib/{ => others}/mxcrg/mxcrg.v | 0 targets/mlabs_video.py | 4 ++-- 4 files changed, 2 insertions(+), 2 deletions(-) create mode 100644 misoclib/others/__init__.py rename misoclib/{ => others}/mxcrg/__init__.py (100%) rename misoclib/{ => others}/mxcrg/mxcrg.v (100%) diff --git a/misoclib/others/__init__.py b/misoclib/others/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/misoclib/mxcrg/__init__.py b/misoclib/others/mxcrg/__init__.py similarity index 100% rename from misoclib/mxcrg/__init__.py rename to misoclib/others/mxcrg/__init__.py diff --git a/misoclib/mxcrg/mxcrg.v b/misoclib/others/mxcrg/mxcrg.v similarity index 100% rename from misoclib/mxcrg/mxcrg.v rename to misoclib/others/mxcrg/mxcrg.v diff --git a/targets/mlabs_video.py b/targets/mlabs_video.py index fe8bf1b24..8245a9383 100644 --- a/targets/mlabs_video.py +++ b/targets/mlabs_video.py @@ -4,7 +4,7 @@ from fractions import Fraction from migen.fhdl.std import * from mibuild.generic_platform import ConstraintError -from misoclib import mxcrg +from misoclib.others import mxcrg from misoclib.mem import sdram from misoclib.mem.sdram.phy import s6ddrphy from misoclib.mem.flash import norflash16 @@ -76,7 +76,7 @@ INST "mxcrg/rd_bufpll" LOC = "BUFPLL_X0Y3"; PIN "mxcrg/bufg_x1.O" CLOCK_DEDICATED_ROUTE = FALSE; """) - platform.add_source_dir(os.path.join("misoclib", "mxcrg")) + platform.add_source_dir(os.path.join("misoclib", "others", "mxcrg")) class MiniSoC(BaseSoC): csr_map = {