From 8428e89f098d5cc0d289feea354cb737cff7f5f1 Mon Sep 17 00:00:00 2001 From: asadaleem-rs Date: Mon, 30 Aug 2021 17:36:40 +0500 Subject: [PATCH] customize main ram size from command line argument --- litex/tools/litex_sim.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py index b1ab167c5..f046ac4d9 100755 --- a/litex/tools/litex_sim.py +++ b/litex/tools/litex_sim.py @@ -325,7 +325,8 @@ def main(): if args.rom_init: soc_kwargs["integrated_rom_init"] = get_mem_data(args.rom_init, cpu.endianness) if not args.with_sdram: - soc_kwargs["integrated_main_ram_size"] = 0x10000000 # 256 MB +#configure main ram size from command line argument + soc_kwargs["integrated_main_ram_size"] = args.integrated_main_ram_size if args.ram_init is not None: soc_kwargs["integrated_main_ram_init"] = get_mem_data(args.ram_init, cpu.endianness) else: