diff --git a/targets/pipistrello.py b/targets/pipistrello.py
index cbd958c45..cde9be4c5 100644
--- a/targets/pipistrello.py
+++ b/targets/pipistrello.py
@@ -120,6 +120,8 @@ class BaseSoC(SDRAMSoC):
         if not self.integrated_rom_size:
             self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash4x"),
                                                          dummy=10, div=4)
+            self.add_constant("SPIFLASH_PAGE_SIZE", 256)
+            self.add_constant("SPIFLASH_SECTOR_SIZE", 0x10000)
             self.flash_boot_address = 0x180000
             self.register_rom(self.spiflash.bus, 0x1000000)