From 1944289e646edd0c8b269700931a796310be6bbb Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 5 Sep 2018 13:01:51 +0200 Subject: [PATCH] litex_server: update pcie and remove bar_size parameter --- litex/soc/tools/remote/comm_pcie.py | 9 ++++----- litex/soc/tools/remote/litex_server.py | 7 +++---- 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/litex/soc/tools/remote/comm_pcie.py b/litex/soc/tools/remote/comm_pcie.py index c30095059..3cfb0efb1 100644 --- a/litex/soc/tools/remote/comm_pcie.py +++ b/litex/soc/tools/remote/comm_pcie.py @@ -2,9 +2,8 @@ import mmap class CommPCIe: - def __init__(self, bar, bar_size, debug=False): + def __init__(self, bar, debug=False): self.bar = bar - self.bar_size = bar_size self.debug = debug def open(self): @@ -12,7 +11,7 @@ class CommPCIe: return self.sysfs = open(self.bar, "r+b") self.sysfs.flush() - self.mmap = mmap.mmap(self.sysfs.fileno(), self.bar_size) + self.mmap = mmap.mmap(self.sysfs.fileno(), 0) def close(self): if not hasattr(self, "sysfs"): @@ -27,7 +26,7 @@ class CommPCIe: length_int = 1 if length is None else length for i in range(length_int): self.mmap.seek(addr + 4*i) - value = int.from_bytes(self.mmap.read(4), "big") + value = int.from_bytes(self.mmap.read(4), byteorder="little") if self.debug: print("read {:08x} @ {:08x}".format(value, addr + 4*i)) if length is None: @@ -39,6 +38,6 @@ class CommPCIe: data = data if isinstance(data, list) else [data] length = len(data) for i, value in enumerate(data): - self.mmap[addr + 4*i:addr + 4*(i + 1)] = value.to_bytes(4, byteorder="big") + self.mmap[addr + 4*i:addr + 4*(i + 1)] = value.to_bytes(4, byteorder="little") if self.debug: print("write {:08x} @ {:08x}".format(value, addr + 4*i)) diff --git a/litex/soc/tools/remote/litex_server.py b/litex/soc/tools/remote/litex_server.py index 180b65085..c2ae8cc02 100644 --- a/litex/soc/tools/remote/litex_server.py +++ b/litex/soc/tools/remote/litex_server.py @@ -97,7 +97,7 @@ def main(): print("usages:") print("litex_server uart [port] [baudrate]") print("litex_server udp [server] [server_port]") - print("litex_server pcie [bar] [bar_size]") + print("litex_server pcie [bar]") sys.exit() comm = sys.argv[1] if comm == "uart": @@ -123,13 +123,12 @@ def main(): elif comm == "pcie": from litex.soc.tools.remote import CommPCIe bar = "" - bar_size = 1024*1024 if len(sys.argv) > 2: bar = sys.argv[2] if len(sys.argv) > 3: bar_size = int(sys.argv[3]) - print("[CommPCIe] bar: {} / bar_size: {} / ".format(bar, bar_size), end="") - comm = CommPCIe(bar, bar_size) + print("[CommPCIe] bar: {} / ".format(bar), end="") + comm = CommPCIe(bar) else: raise NotImplementedError