From 196b68e4afdbbea8d6384be23a850e8908d7fa5e Mon Sep 17 00:00:00 2001 From: Marcus Comstedt Date: Sat, 7 Oct 2023 09:25:08 +0200 Subject: [PATCH] interconnect/wishbone: Add linear burst support to DownConverter --- litex/soc/interconnect/wishbone.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/litex/soc/interconnect/wishbone.py b/litex/soc/interconnect/wishbone.py index 05dab1b33..212064bd1 100644 --- a/litex/soc/interconnect/wishbone.py +++ b/litex/soc/interconnect/wishbone.py @@ -285,8 +285,21 @@ class DownConverter(Module): # Control Path. self.comb += [ done.eq(count == (ratio - 1)), + + Case(master.cti, { + # incrementing address burst cycle + CTI_BURST_INCREMENTING: slave.cti.eq(CTI_BURST_INCREMENTING), + # end current burst cycle + CTI_BURST_END: slave.cti.eq(Mux(done, CTI_BURST_END, + CTI_BURST_INCREMENTING)), + # unsupported burst cycle + "default": slave.cti.eq(CTI_BURST_NONE), + }), + # wrap conversion not supported + If(master.bte != 0, slave.cti.eq(CTI_BURST_NONE)), + If(master.stb & master.cyc, - skip.eq(slave.sel == 0), + skip.eq((slave.sel == 0) & (slave.cti == CTI_BURST_NONE)), slave.cyc.eq(~skip), slave.stb.eq(~skip), slave.we.eq(master.we),