From 1f9db583fd47c82d42e51058774d3654fae16883 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sun, 26 Apr 2020 21:05:47 +0200 Subject: [PATCH] serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :). --- litex/soc/cores/cpu/serv/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/cores/cpu/serv/core.py b/litex/soc/cores/cpu/serv/core.py index ab73cea22..e24853c4a 100644 --- a/litex/soc/cores/cpu/serv/core.py +++ b/litex/soc/cores/cpu/serv/core.py @@ -88,4 +88,4 @@ class SERV(CPU): def do_finalize(self): assert hasattr(self, "reset_address") - self.specials += Instance("serv_top", **self.cpu_params) + self.specials += Instance("serv_rf_top", **self.cpu_params)