From 2418367c7a7e834243dbfd78aebbee90d105795c Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 26 Nov 2012 18:19:10 +0100 Subject: [PATCH] examples/sim/memory: do not use MemoryPort --- examples/sim/memory.py | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/examples/sim/memory.py b/examples/sim/memory.py index 34ae11268..1b1e67c7d 100644 --- a/examples/sim/memory.py +++ b/examples/sim/memory.py @@ -7,12 +7,9 @@ from migen.sim.icarus import Runner class Mem: def __init__(self): - self.a = Signal(BV(12)) - self.d = Signal(BV(16)) - p = MemoryPort(self.a, self.d) # Initialize the beginning of the memory with integers # from 0 to 19. - self.mem = Memory(16, 2**12, p, init=list(range(20))) + self.mem = Memory(16, 2**12, init=list(range(20))) def do_simulation(self, s): # Read the memory. Use the cycle counter as address.