From 29ed3918cce98bb1a53536f0f452f0944be7edba Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Fri, 18 Apr 2014 15:01:50 +0200
Subject: [PATCH] fhdl: forbid zero-length signals

---
 migen/fhdl/structure.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/migen/fhdl/structure.py b/migen/fhdl/structure.py
index c2268428d..7ab425456 100644
--- a/migen/fhdl/structure.py
+++ b/migen/fhdl/structure.py
@@ -262,7 +262,8 @@ class Signal(Value):
 				self.nbits, self.signed = bits_sign
 			else:
 				self.nbits, self.signed = bits_sign, False
-		assert(isinstance(self.nbits, int))
+		if not isinstance(self.nbits, int) or self.nbits <= 0:
+			raise ValueError("Signal width must be a strictly positive integer")
 		
 		self.variable = variable # deprecated
 		self.reset = reset