From 2b4c75ddd3aa5a74ee4e1bdd72dca2d98a90317c Mon Sep 17 00:00:00 2001 From: Hans Baier Date: Thu, 11 May 2023 08:24:12 +0700 Subject: [PATCH] Avalon2Wishbone: Burst can only advance if write is high and waitrequest low --- litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py b/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py index 19f3e7984..4bdeaa3fc 100644 --- a/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py +++ b/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py @@ -100,7 +100,7 @@ class AvalonMM2Wishbone(Module): If(burst_count == 1, wb.cti.eq(wishbone.CTI_BURST_END) ), - If(~avl.waitrequest, + If(~avl.waitrequest & avl.write, NextValue(burst_address, burst_address + burst_increment), NextValue(burst_count, burst_count - 1), ),