From 44b6fb5a28668c0d54b715b1e2bc7b1a8fdb8925 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fin=20Maa=C3=9F?= <f.maass@vogl-electronic.com>
Date: Wed, 29 May 2024 11:51:24 +0200
Subject: [PATCH 1/2] add spi master function
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
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add spi master function and dts wrapper for zephyr.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
---
 litex/soc/integration/soc.py         | 21 +++++++++++++++++++++
 litex/tools/litex_json2dts_zephyr.py | 27 +++++++++++++++++++++++++--
 2 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py
index e03e175ab..ce8b5f615 100644
--- a/litex/soc/integration/soc.py
+++ b/litex/soc/integration/soc.py
@@ -1965,6 +1965,27 @@ class LiteXSoC(SoC):
             add_ip_address_constants(self,  "REMOTEIP", ethmac_remote_ip)
             add_mac_address_constants(self, "MACADDR",  ethmac_address)
 
+    # Add SPI Master --------------------------------------------------------------------------------
+    def add_spi_master(self, name="spimaster", pads=None, data_width=8, spi_clk_freq=1e6, with_clk_divider=True, **kwargs):
+        # Imports.
+        from litex.soc.cores.spi import SPIMaster
+
+        self.check_if_exists(f"{name}")
+
+        if pads is None:
+            pads = self.platform.request(name)
+
+        spim = SPIMaster(pads, data_width, self.sys_clk_freq, spi_clk_freq, **kwargs)
+
+        if with_clk_divider:
+            spim.add_clk_divider()
+
+        self.add_module(name=f"{name}", module=spim)
+
+        self.add_constant(f"{name}_FREQUENCY",     spi_clk_freq)
+        self.add_constant(f"{name}_DATA_WIDTH",     data_width)
+        self.add_constant(f"{name}_MAX_CS",    len(pads.cs_n))
+
     # Add SPI Flash --------------------------------------------------------------------------------
     def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=20e6, module=None, phy=None, rate="1:1", software_debug=False, **kwargs):
         # Imports.
diff --git a/litex/tools/litex_json2dts_zephyr.py b/litex/tools/litex_json2dts_zephyr.py
index 329d8da54..236a62e43 100755
--- a/litex/tools/litex_json2dts_zephyr.py
+++ b/litex/tools/litex_json2dts_zephyr.py
@@ -181,6 +181,26 @@ def i2s_handler(name, parm, csr):
     return dtsi
 
 
+def spimaster_handler(name, parm, csr):
+    registers = get_registers_of(name, csr)
+    if len(registers) == 0:
+        raise KeyError
+
+    dtsi = dts_reg(registers)
+    dtsi += dts_reg_names(registers)
+
+    dtsi += indent("clock-frequency = <{}>;\n".format(
+        csr['constants'][name + '_frequency']))
+
+    dtsi += indent("data-width = <{}>;\n".format(
+        csr['constants'][name + '_data_width']))
+
+    dtsi += indent("max-cs = <{}>;\n".format(
+        csr['constants'][name + '_max_cs']))
+
+    return dtsi
+
+
 def peripheral_handler(name, parm, csr):
     registers = get_registers_of(name, csr)
     if len(registers) == 0:
@@ -219,10 +239,13 @@ overlay_handlers = {
         'alias': 'eth0',
         'config_entry': 'ETH_LITEETH'
     },
+    'spimaster': {
+        'handler': spimaster_handler,
+        'alias': 'spi0',
+    },
     'spiflash': {
         'handler': peripheral_handler,
-        'alias': 'spi0',
-        'config_entry': 'SPI_LITESPI'
+        'alias': 'spi1',
     },
     'sdcard_block2mem': {
         'handler': peripheral_handler,

From bb155b5a9091f7bb19e85edc6b2b2f5d4151d1f2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fin=20Maa=C3=9F?= <f.maass@vogl-electronic.com>
Date: Wed, 29 May 2024 11:57:18 +0200
Subject: [PATCH 2/2] litex_json2dts_zephyr.py: add custon handler for spiflash
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

add custon handler for spiflash.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
---
 litex/tools/litex_json2dts_zephyr.py | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/litex/tools/litex_json2dts_zephyr.py b/litex/tools/litex_json2dts_zephyr.py
index 236a62e43..b5a2451d1 100755
--- a/litex/tools/litex_json2dts_zephyr.py
+++ b/litex/tools/litex_json2dts_zephyr.py
@@ -201,6 +201,31 @@ def spimaster_handler(name, parm, csr):
     return dtsi
 
 
+def spiflash_handler(name, parm, csr):
+    registers = get_registers_of(name, csr)
+    if len(registers) == 0:
+        raise KeyError
+
+    # Add memory mapped region for spiflash, the linker script in zephyr expects this region to be
+    # the entry with the name flash_mmap in the reg property of the spi controller.
+    try:
+        registers.append({
+            'addr': csr['memories'][name]['base'],
+            'size': csr['memories'][name]['size'],
+            'name': 'flash_mmap',
+        })
+    except KeyError as e:
+        print('memory mapped', e, 'not found')
+
+    dtsi = dts_reg(registers)
+    dtsi += dts_reg_names(registers)
+
+    dtsi += indent("clock-frequency = <{}>;\n".format(
+        csr['constants'][name + '_phy_frequency']))
+
+    return dtsi
+
+
 def peripheral_handler(name, parm, csr):
     registers = get_registers_of(name, csr)
     if len(registers) == 0:
@@ -244,7 +269,7 @@ overlay_handlers = {
         'alias': 'spi0',
     },
     'spiflash': {
-        'handler': peripheral_handler,
+        'handler': spiflash_handler,
         'alias': 'spi1',
     },
     'sdcard_block2mem': {