From 2fd7451fc92e9fa15925b680014660e2d413922b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 3 Mar 2021 08:54:31 +0100 Subject: [PATCH] soc/cores/code_8b10b: Minor cosmetic cleanups. --- litex/soc/cores/code_8b10b.py | 49 ++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 24 deletions(-) diff --git a/litex/soc/cores/code_8b10b.py b/litex/soc/cores/code_8b10b.py index 0d4fc5e24..aa6f55c29 100644 --- a/litex/soc/cores/code_8b10b.py +++ b/litex/soc/cores/code_8b10b.py @@ -111,8 +111,8 @@ table_5b6b = [ 0b010100, ] table_5b6b_unbalanced = [bool(disparity(c, 6)) for c in table_5b6b] -table_5b6b_flip = list(table_5b6b_unbalanced) -table_5b6b_flip[7] = True +table_5b6b_flip = list(table_5b6b_unbalanced) +table_5b6b_flip[7] = True table_6b5b = reverse_table_flip(table_5b6b, table_5b6b_flip, 6) @@ -129,20 +129,20 @@ table_3b4b = [ 0b0010, 0b1010, 0b0110, - 0b0001, # primary D.x.7 + 0b0001, # Primary D.x.7 ] table_3b4b_unbalanced = [bool(disparity(c, 4)) for c in table_3b4b] -table_3b4b_flip = list(table_3b4b_unbalanced) -table_3b4b_flip[3] = True +table_3b4b_flip = list(table_3b4b_unbalanced) +table_3b4b_flip[3] = True table_4b3b = reverse_table_flip(table_3b4b, table_3b4b_flip, 4) -# alternative D.x.7 +# Alternative D.x.7 table_4b3b[0b0111] = 0b0111 table_4b3b[0b1000] = 0b0111 table_4b3b_kn = reverse_table(table_3b4b, 4) table_4b3b_kp = reverse_table([~x & 0b1111 for x in table_3b4b], 4) -# primary D.x.7 is not used +# Primary D.x.7 is not used table_4b3b_kn[0b0001] = 0b000 table_4b3b_kn[0b1000] = 0b111 table_4b3b_kp[0b1110] = 0b000 @@ -153,20 +153,20 @@ table_4b3b_kp[0b0111] = 0b111 @CEInserter() class SingleEncoder(Module): def __init__(self, lsb_first=False): - self.d = Signal(8) - self.k = Signal() - self.disp_in = Signal() + self.d = Signal(8) + self.k = Signal() + self.disp_in = Signal() - self.output = Signal(10) + self.output = Signal(10) self.disp_out = Signal() # # # - # stage 1: 5b/6b and 3b/4b encoding - code5b = self.d[:5] - code6b = Signal(6, reset_less=True) + # Stage 1: 5b/6b and 3b/4b encoding. + code5b = self.d[:5] + code6b = Signal(6, reset_less=True) code6b_unbalanced = Signal(reset_less=True) - code6b_flip = Signal() + code6b_flip = Signal() self.sync += [ If(self.k & (code5b == 28), code6b.eq(0b110000), @@ -179,10 +179,10 @@ class SingleEncoder(Module): ) ] - code3b = self.d[5:] - code4b = Signal(4, reset_less=True) + code3b = self.d[5:] + code4b = Signal(4, reset_less=True) code4b_unbalanced = Signal(reset_less=True) - code4b_flip = Signal() + code4b_flip = Signal() self.sync += [ code4b.eq(Array(table_3b4b)[code3b]), code4b_unbalanced.eq(Array(table_3b4b_unbalanced)[code3b]), @@ -193,8 +193,8 @@ class SingleEncoder(Module): ) ] - alt7_rd0 = Signal(reset_less=True) # if disparity is -1, use alternative D.x.7 - alt7_rd1 = Signal(reset_less=True) # if disparity is +1, use alternative D.x.7 + alt7_rd0 = Signal(reset_less=True) # If disparity is -1, use alternative D.x.7. + alt7_rd1 = Signal(reset_less=True) # If disparity is +1, use alternative D.x.7. self.sync += [ alt7_rd0.eq(0), alt7_rd1.eq(0), @@ -210,8 +210,8 @@ class SingleEncoder(Module): ) ] - # stage 2 (combinatorial): disparity control - output_6b = Signal(6) + # Stage 2 (combinatorial): disparity control. + output_6b = Signal(6) disp_inter = Signal() self.comb += [ disp_inter.eq(self.disp_in ^ code6b_unbalanced), @@ -268,8 +268,7 @@ class Encoder(Module): for e1, e2 in zip(encoders, encoders[1:]): self.comb += e2.disp_in.eq(e1.disp_out) - for d, k, output, disparity, encoder in \ - zip(self.d, self.k, self.output, self.disparity, encoders): + for d, k, output, disparity, encoder in zip(self.d, self.k, self.output, self.disparity, encoders): self.comb += [ encoder.d.eq(d), encoder.k.eq(k) @@ -350,6 +349,7 @@ class StreamEncoder(stream.PipelinedActor): # # # + # Encoders encoder = Encoder(nwords, True) self.submodules += encoder @@ -374,6 +374,7 @@ class StreamDecoder(stream.PipelinedActor): # # # + # Decoders decoders = [Decoder(True) for _ in range(nwords)] self.submodules += decoders