diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index acb3322e1..3c3f13bf2 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -1283,7 +1283,3 @@ class LiteXSoC(SoC): self.submodules.sdwriter_fifo = stream.SyncFIFO([("data", self.bus.data_width)], 512//(self.bus.data_width//8)) self.comb += self.sdwriter.source.connect(self.sdwriter_fifo.sink) self.comb += self.sdwriter_fifo.source.connect(self.sdcore.sink) - - # Timing constraints - if not with_emulator: - self.platform.add_false_path_constraints(self.crg.cd_sys.clk, self.crg.cd_sd.clk) diff --git a/litex/soc/software/liblitesdcard/sdcard.c b/litex/soc/software/liblitesdcard/sdcard.c index c5d803268..b3ad3f322 100644 --- a/litex/soc/software/liblitesdcard/sdcard.c +++ b/litex/soc/software/liblitesdcard/sdcard.c @@ -101,6 +101,31 @@ int sdcard_wait_response(void) { return status; } +/*-----------------------------------------------------------------------*/ +/* SDCard clocker functions */ +/*-----------------------------------------------------------------------*/ + +static uint32_t log2(uint32_t x) +{ + uint32_t r = 0 ; + while(x >>= 1) r++; + return r; +} + +static void sdcard_set_clk_freq(uint32_t clk_freq) { + uint32_t divider; + divider = CONFIG_CLOCK_FREQUENCY/clk_freq + 1; + divider = (1 << log2(divider)); +//#ifdef SDCARD_DEBUG + printf("Setting SDCard clk freq to "); + if (clk_freq > 1000000) + printf("%d MHz\n", (CONFIG_CLOCK_FREQUENCY/divider)/1000000); + else + printf("%d KHz\n", (CONFIG_CLOCK_FREQUENCY/divider)/1000); +//#endif + sdphy_clocker_divider_write(divider); +} + /*-----------------------------------------------------------------------*/ /* SDCard commands functions */ /*-----------------------------------------------------------------------*/ @@ -415,6 +440,9 @@ void sdcard_decode_csd(void) { int sdcard_init(void) { unsigned short rca; + /* initialize freq */ + sdcard_set_clk_freq(16000000); + /* initialize card */ sdphy_init_initialize_write(1); busy_wait(1);