From 3601b715843d62b67733651f6b8016f382723197 Mon Sep 17 00:00:00 2001 From: David Jablonski Date: Sat, 21 Dec 2024 12:48:27 +0100 Subject: [PATCH] backwards compatibility with python3.7 --- litex/soc/cores/clock/xilinx_usp.py | 3 ++- litex/tools/litex_json2dts_linux.py | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/litex/soc/cores/clock/xilinx_usp.py b/litex/soc/cores/clock/xilinx_usp.py index da4a88889..aca1ff24d 100644 --- a/litex/soc/cores/clock/xilinx_usp.py +++ b/litex/soc/cores/clock/xilinx_usp.py @@ -143,7 +143,8 @@ class USPMMCM(XilinxClocking): dividers = list(clkdiv_range(*self.clkout_divide_range)) # Add specific range dividers if they exist - if specific_div_range := getattr(self, f"clkout{n}_divide_range", None): + specific_div_range = getattr(self, f"clkout{n}_divide_range", None) + if specific_div_range: dividers.extend(clkdiv_range(*specific_div_range)) # For clkout0, CLKOUT[0]_DIVIDE_F also has range 2.0 to 128.0 with step 0.125 diff --git a/litex/tools/litex_json2dts_linux.py b/litex/tools/litex_json2dts_linux.py index 8d5e7f8c1..909b4d087 100755 --- a/litex/tools/litex_json2dts_linux.py +++ b/litex/tools/litex_json2dts_linux.py @@ -100,7 +100,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic # Clocks --------------------------------------------------------------------------------------- for c in [c for c in d["constants"].keys() if c.endswith("config_clock_frequency")]: - name = c.removesuffix("config_clock_frequency") + "sys_clk" + name = c[:len(c) - len("config_clock_frequency")] + "sys_clk" dts += """ {name}: clock-{freq} {{ compatible = "fixed-clock";