From 3bd5d6cc0ee2daaa970c9f6bba2ae1c6c095c12f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C4=99drzej=20Boczar?= <jboczar@antmicro.com>
Date: Tue, 17 Nov 2020 16:25:17 +0100
Subject: [PATCH] software/liblitedram: fix issues with command/write delays
 not being incremented.

---
 litex/soc/software/liblitedram/sdram.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/litex/soc/software/liblitedram/sdram.c b/litex/soc/software/liblitedram/sdram.c
index 093bb7dc5..433c5b535 100644
--- a/litex/soc/software/liblitedram/sdram.c
+++ b/litex/soc/software/liblitedram/sdram.c
@@ -289,6 +289,7 @@ void sdram_write_leveling_force_cmd_delay(int taps, int show) {
 	if (show)
 		printf("Forcing Cmd delay to %d taps\n", taps);
 	ddrphy_cdly_rst_write(1);
+	cdelay(100);
 	for (i=0; i<taps; i++) {
 		ddrphy_cdly_inc_write(1);
 		cdelay(100);
@@ -330,6 +331,7 @@ static void sdram_write_leveling_rst_delay(int module) {
 	/* rst delay */
 	ddrphy_wdly_dq_rst_write(1);
 	ddrphy_wdly_dqs_rst_write(1);
+	cdelay(100);
 #ifdef SDRAM_PHY_WRITE_LEVELING_REINIT
 	for(i=0; i<ddrphy_half_sys8x_taps_read(); i++) {
 		ddrphy_wdly_dqs_inc_write(1);
@@ -372,12 +374,14 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
 	err_ddrphy_wdly = SDRAM_PHY_DELAYS - ddrphy_half_sys8x_taps_read();
 
 	sdram_write_leveling_on();
+	cdelay(100);
 	for(i=0;i<SDRAM_PHY_MODULES;i++) {
 		if (show)
 			printf("  m%d: |", i);
 
 		/* rst delay */
 		sdram_write_leveling_rst_delay(i);
+		cdelay(100);
 
 		/* scan write delay taps */
 		for(j=0;j<err_ddrphy_wdly;j++) {
@@ -435,21 +439,26 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
 
 		/* rst delay */
 		sdram_write_leveling_rst_delay(i);
+		cdelay(100);
 
 		/* use forced delay if configured */
 		if (_sdram_write_leveling_dat_delays[i] >= 0) {
 			delays[i] = _sdram_write_leveling_dat_delays[i];
 
 			/* configure write delay */
-			for(j=0; j<delays[i]; j++)
+			for(j=0; j<delays[i]; j++)  {
 				sdram_write_leveling_inc_delay(i);
+				cdelay(100);
+			}
 		/* succeed only if the start of a 1s window has been found */
 		} else if (one_window_best_count > 0 && one_window_best_start > 0) {
 			delays[i] = one_window_best_start;
 
 			/* configure write delay */
-			for(j=0; j<delays[i]; j++)
+			for(j=0; j<delays[i]; j++) {
 				sdram_write_leveling_inc_delay(i);
+				cdelay(100);
+			}
 		}
 		if (show) {
 			if (delays[i] == -1)
@@ -479,6 +488,7 @@ static void sdram_write_leveling_find_cmd_delay(unsigned int *best_error, int *b
 
 	/* scan through the range */
 	ddrphy_cdly_rst_write(1);
+	cdelay(100);
 	for (cdly = cdly_start; cdly < cdly_stop; cdly += cdly_step) {
 		/* increment cdly to current value */
 		while (cdly_actual < cdly) {
@@ -561,6 +571,7 @@ int sdram_write_leveling(void)
 	/* set working or forced delay */
 	if (best_cdly >= 0) {
 		ddrphy_cdly_rst_write(1);
+		cdelay(100);
 		for (int i = 0; i < best_cdly; ++i) {
 			ddrphy_cdly_inc_write(1);
 			cdelay(100);