From e90caa86833cbde064c868506cc565e6e26d9887 Mon Sep 17 00:00:00 2001
From: "Gabriel L. Somlo" <gsomlo@gmail.com>
Date: Thu, 23 May 2019 08:53:26 -0400
Subject: [PATCH] tools/litex_sim: restore functionality of '--with-sdram'
 option

After LiteDRAM commit #50e1d478, an additional positional argument
('databits') is required by the PhySettings() constructor.

The value used here (32) will generate a 64MByte simulated SDRAM.
---
 litex/tools/litex_sim.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py
index 126da466b..033a0e455 100755
--- a/litex/tools/litex_sim.py
+++ b/litex/tools/litex_sim.py
@@ -116,6 +116,7 @@ class SimSoC(SoCSDRAM):
             sdram_module =  MT48LC16M16(100e6, "1:1") # use 100MHz timings
             phy_settings = PhySettings(
                 memtype="SDR",
+                databits=32,
                 dfi_databits=16,
                 nphases=1,
                 rdphase=0,