From 40740d3ddc044d9eb7a075d33cab404e34ae9c40 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 22 Jul 2015 14:13:41 +0200 Subject: [PATCH] litepcie: use optional platform.misoc_path to add litepcie phy wrapper verilog files We should eventually try to use python package_data or data_file for that. --- .../litepcie/example_designs/targets/dma.py | 1 + misoclib/com/litepcie/phy/s7pciephy.py | 18 ++++++++---------- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/misoclib/com/litepcie/example_designs/targets/dma.py b/misoclib/com/litepcie/example_designs/targets/dma.py index 90f3ec889..b88e80927 100644 --- a/misoclib/com/litepcie/example_designs/targets/dma.py +++ b/misoclib/com/litepcie/example_designs/targets/dma.py @@ -69,6 +69,7 @@ class PCIeDMASoC(SoC, AutoCSR): with_timer=False ) self.submodules.crg = _CRG(platform) + platform.misoc_path = "../../../../" # PCIe endpoint self.submodules.pcie_phy = S7PCIEPHY(platform, link_width=2) diff --git a/misoclib/com/litepcie/phy/s7pciephy.py b/misoclib/com/litepcie/phy/s7pciephy.py index 80c7763c4..408692136 100644 --- a/misoclib/com/litepcie/phy/s7pciephy.py +++ b/misoclib/com/litepcie/phy/s7pciephy.py @@ -151,15 +151,13 @@ class S7PCIEPHY(Module, AutoCSR): convert_size(dcommand[12:15], self.max_request_size), convert_size(dcommand[5:8], self.max_payload_size) ] - - extcores_path = "extcores" - # XXX find a better way to do this? - current_path = os.getcwd() - current_path = current_path.replace("\\", "/") - if "litepcie/example_designs" in current_path: - extcores_path = os.path.join("..", "..", "..", "..", extcores_path) - platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "common")) + if hasattr(platform, "misoc_path"): + misoc_path = platform.misoc_path + else: + misoc_path = "./" + litepcie_phy_wrapper_path = os.path.join(misoc_path, "extcores", "litepcie_phy_wrappers") + platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "common")) if device[:4] == "xc7k": - platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "kintex7")) + platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "kintex7")) elif device[:4] == "xc7a": - platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "artix7")) + platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "artix7"))