From 8265d0672850275ad7fed5eb259fb05f4364d0f5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 4 Dec 2020 15:25:07 +0100 Subject: [PATCH 1/3] tools/litex_json2dts: Fix SPI bus #size-cells As per Documentation/devicetree/bindings/spi/spi-controller.yaml, "#size-cells" must be zero for a PCI bus. This gets rid of the following build warnings: build/orangecrab/orangecrab.dts:105.29-39: Warning (reg_format): /soc/spi@f0004800/mmc-slot@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) buildroot/rv32.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format' buildroot/rv32.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' buildroot/rv32.dtb: Warning (simple_bus_reg): Failed prerequisite 'reg_format' buildroot/rv32.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' build/orangecrab/orangecrab.dts:91.46-110.19: Warning (spi_bus_bridge): /soc/spi@f0004800: incorrect #size-cells for SPI bus buildroot/rv32.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format' buildroot/rv32.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge' Fixes: fafa844aa78d552e ("json2dts: Add Linux DT generation script") Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index ebaa07218..4aadf1a91 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -254,7 +254,7 @@ def generate_dts(d): litespi,num-cs = <1>; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; spidev0: spidev@0 {{ compatible = "linux,spidev"; @@ -302,7 +302,7 @@ def generate_dts(d): litespi,num-cs = <1>; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; mmc-slot@0 {{ compatible = "mmc-spi-slot"; From a17b535906a93ae403a27fc51a547f66198c1534 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 4 Dec 2020 15:40:16 +0100 Subject: [PATCH 2/3] tools/litex_json2dts: Fix DTS indentation Make indentation of the generated DTS more consistent, by always using 8 spaces (no TABs), and aligning continued lines. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index 4aadf1a91..e2317794a 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -184,8 +184,8 @@ def generate_dts(d): mac0: mac@{ethmac_csr_base:x} {{ compatible = "litex,liteeth"; reg = <0x{ethmac_csr_base:x} 0x7c - 0x{ethphy_csr_base:x} 0x0a - 0x{ethmac_mem_base:x} 0x2000>; + 0x{ethphy_csr_base:x} 0x0a + 0x{ethmac_mem_base:x} 0x2000>; tx-fifo-depth = <{ethmac_tx_slots}>; rx-fifo-depth = <{ethmac_rx_slots}>; }}; @@ -273,8 +273,8 @@ def generate_dts(d): dts += """ litespiflash: spiflash@{spiflash_csr_base:x} {{ - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; compatible = "litex,spiflash"; reg = <0x{spiflash_csr_base:x} 0x100>; flash: flash@0 {{ @@ -306,10 +306,10 @@ def generate_dts(d): mmc-slot@0 {{ compatible = "mmc-spi-slot"; - reg = <0>; + reg = <0>; voltage-ranges = <3300 3300>; spi-max-frequency = <1500000>; - status = "okay"; + status = "okay"; }}; }}; """.format(spisdcard_csr_base=d["csr_bases"]["spisdcard"]) @@ -408,7 +408,7 @@ def generate_dts(d): return """ CLKOUT{clkout_nr}: CLKOUT{clkout_nr} {{ compatible = "litex,clk"; - #clock-cells = <0>; + #clock-cells = <0>; clock-output-names = "CLKOUT{clkout_nr}"; reg = <{clkout_nr}>; litex,clock-frequency = <{clk_f}>; From d8b844bbda33afb0eae4272137ad4e21a6d35ebf Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 4 Dec 2020 16:38:48 +0100 Subject: [PATCH 3/3] tools/litex_json2dts: Group tuples in liteeth reg property To improve human readability and enable automatic validation, the tuples in "reg" properties should be grouped using angle brackets. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index e2317794a..345b111dd 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -183,9 +183,9 @@ def generate_dts(d): dts += """ mac0: mac@{ethmac_csr_base:x} {{ compatible = "litex,liteeth"; - reg = <0x{ethmac_csr_base:x} 0x7c - 0x{ethphy_csr_base:x} 0x0a - 0x{ethmac_mem_base:x} 0x2000>; + reg = <0x{ethmac_csr_base:x} 0x7c>, + <0x{ethphy_csr_base:x} 0x0a>, + <0x{ethmac_mem_base:x} 0x2000>; tx-fifo-depth = <{ethmac_tx_slots}>; rx-fifo-depth = <{ethmac_rx_slots}>; }};