From 53ae12ca65ecfa5f1a55ade4fa2786e20beb6360 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fin=20Maa=C3=9F?= <f.maass@vogl-electronic.com>
Date: Tue, 11 Jun 2024 10:40:06 +0200
Subject: [PATCH] litex_json2renode: correct VexRiscv variants
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corrrect the VexRiscv variants.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
---
 litex/tools/litex_json2renode.py | 28 +++++++++++++++++-----------
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py
index 395a8f46a..fd91e78a0 100755
--- a/litex/tools/litex_json2renode.py
+++ b/litex/tools/litex_json2renode.py
@@ -219,23 +219,29 @@ def get_cpu_count(csr):
 vexriscv_common_kind = {
     'name': 'VexRiscv',
     'variants': {
-        'linux': {
-             'properties': ['cpuType: "rv32ima"', 'privilegeArchitecture: PrivilegeArchitecture.Priv1_10'],
+        'minimal': {
+             'properties': ['cpuType: "rv32i_zicsr_zifencei"'],
         },
-        'i': {
-             'properties': ['cpuType: "rv32i"'], 
+        'lite': {
+             'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
         },
-        'im': {
-             'properties': ['cpuType: "rv32im"'], 
-        },
-        'ima': {
-             'properties': ['cpuType: "rv32ima"'], 
+        'standard': {
+             'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
         },
         'imac': {
-             'properties': ['cpuType: "rv32imac"'], 
+             'properties': ['cpuType: "rv32imac_zicsr_zifencei"'],
+        },
+        'full': {
+             'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
+        },
+        'linux': {
+             'properties': ['cpuType: "rv32ima_zicsr_zifencei"'],
+        },
+        'secure': {
+             'properties': ['cpuType: "rv32ima_zicsr_zifencei"'],
         },
         'others': {
-             'properties': ['cpuType: "rv32im"'],
+             'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
         }
     },
     'supports_time_provider': True,