From 570ea8ccf8814c01cb15f6d32ab4620db28e438e Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 13 Jan 2012 17:07:46 +0100 Subject: [PATCH] convtools -> tools --- top.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/top.py b/top.py index cf20977b2..be0bba67a 100644 --- a/top.py +++ b/top.py @@ -1,5 +1,5 @@ from migen.fhdl.structure import * -from migen.fhdl import convtools, verilog, autofragment +from migen.fhdl import tools, verilog, autofragment from migen.bus import wishbone, csr, wishbone2csr from milkymist import m1reset, clkfx, lm32, norflash, uart @@ -24,7 +24,7 @@ def get(): csrcon0 = csr.Interconnect(wishbone2csr0.csr, [uart0.bank.interface]) frag = autofragment.from_local() - vns = convtools.Namespace() + vns = tools.Namespace() src_verilog = verilog.convert(frag, {clkfx_sys.clkin, reset0.trigger_reset}, name="soc",