diff --git a/CHANGES.md b/CHANGES.md
index 6ce9e8dda..0072e94d1 100644
--- a/CHANGES.md
+++ b/CHANGES.md
@@ -61,6 +61,9 @@
 	- soc/interconnect/stream      : Added pipe_valid/pipe_ready parameters to BufferizeEndpoints.
 	- soc/cores/clock              : Added initial GW5A support.
 	- build/efinix                 : Added initial EfinixDDROutput/Input and simplified IOs exclusion.
+	- soc/interconnect             : Improved DMA Bus to use the same Bus Standard than the CPU DMA Bus.
+	- liteeth/phy                  : Added Artix7 2500BASE-X PHY.
+	- liteeth/phy                  : Added Gowin Arora V RGMII PHY (GW5RGMII).
 
 	[> Changed
 	----------