diff --git a/litex/soc/cores/cpu/rocket/core.py b/litex/soc/cores/cpu/rocket/core.py
index b41b47e8f..d189739e7 100644
--- a/litex/soc/cores/cpu/rocket/core.py
+++ b/litex/soc/cores/cpu/rocket/core.py
@@ -98,7 +98,7 @@ class RocketRV64(CPU):
     gcc_triple           = CPU_GCC_TRIPLE_RISCV64
     linker_output_format = "elf64-littleriscv"
     nop                  = "nop"
-    io_regions           = {0x10000000: 0x70000000} # Origin, Length.
+    io_regions           = {0x12000000: 0x70000000} # Origin, Length.
 
     # Memory Mapping.
     @property