From 5d7e9c94a6f1431a65cbafdcab1615f36f009fce Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael@enjoy-digital.fr>
Date: Tue, 17 Oct 2023 13:17:12 +0200
Subject: [PATCH] build/efinix/dbparser: workaround for Ti60F100S3F2 with only
 3 PLLs

---
 litex/build/efinix/dbparser.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/litex/build/efinix/dbparser.py b/litex/build/efinix/dbparser.py
index 1fa882036..411acc4bf 100644
--- a/litex/build/efinix/dbparser.py
+++ b/litex/build/efinix/dbparser.py
@@ -92,6 +92,10 @@ class EfinixDbParser:
             if p.get('block') == block:
                 names.append(p.get('name'))
 
+        # Ti60F100S3F2 has only 3 PLLs
+        if block == "pll" and self.device == "Ti60F100S3F2":
+            names.remove("PLL_BL0")
+
         print(f"block {block}: names:{names}")
         return names