diff --git a/litex/build/sim/common.py b/litex/build/sim/common.py
index de0301566..649618c13 100644
--- a/litex/build/sim/common.py
+++ b/litex/build/sim/common.py
@@ -14,7 +14,7 @@ class SimDDROutputImpl(Module):
             i_clk = clk
         )
 
-class SimDDROutput
+class SimDDROutput:
     @staticmethod
     def lower(dr):
         return SimDDROutputImpl(dr.o, dr.i1, dr.i2, dr.clk)