diff --git a/litescope/core/storage.py b/litescope/core/storage.py
index d1c8cb297..6707b2076 100644
--- a/litescope/core/storage.py
+++ b/litescope/core/storage.py
@@ -25,9 +25,11 @@ class LiteScopeSubSampler(LiteScopeSubSamplerUnit, AutoCSR):
 		self.comb += self.value.eq(self._value.storage)
 
 class LiteScopeRunLengthEncoderUnit(Module):
-	def __init__(self, dw, length=1024):
+	def __init__(self, dw, length):
 		self.dw = dw
 		self.length = length
+		if dw < (log2_int(length) + 1):
+			raise ValueError("Not enough bits to encode RLE length, increase dw or reduce RLE length")
 
 		self.sink = sink = Sink(data_layout(dw))
 		self.source = source = Source(data_layout(dw))
diff --git a/litescope/frontend/la.py b/litescope/frontend/la.py
index 16be1faca..07bb02acf 100644
--- a/litescope/frontend/la.py
+++ b/litescope/frontend/la.py
@@ -6,13 +6,18 @@ from mibuild.tools import write_to_file
 
 class LiteScopeLA(Module, AutoCSR):
 	def __init__(self, layout, depth, clk_domain="sys",
-			with_input_buffer=False, with_rle=False, with_subsampler=False):
+			with_input_buffer=False,
+			with_rle=False, rle_length=256,
+			with_subsampler=False):
 		self.layout = layout
 		self.data = Cat(*layout)
 		self.dw = flen(self.data)
+		if with_rle:
+			self.dw += 1
 		self.depth = depth
 		self.clk_domain = clk_domain
 		self.with_rle = with_rle
+		self.rle_length = rle_length
 		self.with_input_buffer = with_input_buffer
 		self.with_subsampler = with_subsampler
 
@@ -56,7 +61,7 @@ class LiteScopeLA(Module, AutoCSR):
 		# connect recorder
 		self.comb += Record.connect(self.trigger.source, self.recorder.trigger_sink)
 		if self.with_rle:
-			self.submodules.rle = LiteScopeRunLengthEncoder(self.dw)
+			self.submodules.rle = LiteScopeRunLengthEncoder(self.dw, self.rle_length)
 			self.comb += [
 				Record.connect(sink, self.rle.sink),
 				Record.connect(self.rle.source, self.recorder.data_sink),