From 611b84ccee41cbc527be6bd4e8658554fabd852e Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 24 Oct 2022 18:21:10 +0200
Subject: [PATCH] build/sim/Verilator: Skip .hex in sources.

Useful to use platform.add_source to add/copy .hex files.
---
 litex/build/sim/verilator.py | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/litex/build/sim/verilator.py b/litex/build/sim/verilator.py
index 3f1ba6b98..a8b19a2cb 100644
--- a/litex/build/sim/verilator.py
+++ b/litex/build/sim/verilator.py
@@ -8,6 +8,7 @@
 import os
 import sys
 import subprocess
+from pathlib import Path
 from shutil import which
 
 from migen.fhdl.structure import _Fragment
@@ -132,9 +133,12 @@ def _generate_sim_config(config):
 
 def _build_sim(build_name, sources, jobs, threads, coverage, opt_level="O3", trace_fst=False):
     makefile = os.path.join(core_directory, 'Makefile')
+
     cc_srcs = []
     for filename, language, library, *copy in sources:
-        cc_srcs.append("--cc " + filename + " ")
+        if Path(filename).suffix not in [".hex"]:
+            cc_srcs.append("--cc " + filename + " ")
+
     build_script_contents = """\
 rm -rf obj_dir/
 make -C . -f {} {} {} {} {} {} {}