From 6462ee7fe198b197a5352cd09c74d6ea0f19ead6 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 4 Jul 2014 10:29:42 +0200 Subject: [PATCH] Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable. --- verilog/mor1kx/submodule | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/verilog/mor1kx/submodule b/verilog/mor1kx/submodule index e0e2f058e..bae88d1bb 160000 --- a/verilog/mor1kx/submodule +++ b/verilog/mor1kx/submodule @@ -1 +1 @@ -Subproject commit e0e2f058e3ebba40a9a0231c5f54aa1d6b04bb74 +Subproject commit bae88d1bbc3f0dd12aacb9d119902b4a0c5a7e1b