diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
index 8d8ddfefe..94df63168 100644
--- a/litex/soc/software/bios/sdram.c
+++ b/litex/soc/software/bios/sdram.c
@@ -269,6 +269,13 @@ void sdrwlon(void)
 	sdram_dfii_pi0_address_write(DDRX_MR1 | (1 << 7));
 	sdram_dfii_pi0_baddress_write(1);
 	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+	sdram_dfii_pi0_address_write((DDRX_MR1 | (1 << 7)) ^ 0x2BF8) ;
+	sdram_dfii_pi0_baddress_write(1 ^ 0xF);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
+
 	ddrphy_wlevel_en_write(1);
 }
 
@@ -277,6 +284,13 @@ void sdrwloff(void)
 	sdram_dfii_pi0_address_write(DDRX_MR1);
 	sdram_dfii_pi0_baddress_write(1);
 	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+	sdram_dfii_pi0_address_write(DDRX_MR1 ^ 0x2BF8);
+	sdram_dfii_pi0_baddress_write(1 ^ 0xF);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
+
 	ddrphy_wlevel_en_write(0);
 }
 
@@ -1158,6 +1172,12 @@ void sdrmrwr(char reg, int value) {
 	sdram_dfii_pi0_address_write(value);
 	sdram_dfii_pi0_baddress_write(reg);
 	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+
+#ifdef SDRAM_PHY_DDR4_RDIMM
+	sdram_dfii_pi0_address_write(value ^ 0x2BF8);
+	sdram_dfii_pi0_baddress_write(reg ^ 0xF);
+	command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
+#endif
 }
 
 static void sdrmpron(char mpr)