From 681f474c660606512c6b1055e568c4dded899382 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 20 Jan 2022 09:25:49 +0100
Subject: [PATCH] CHANGEs: Update.

---
 CHANGES | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/CHANGES b/CHANGES
index b859ff84e..e0c13c942 100644
--- a/CHANGES
+++ b/CHANGES
@@ -20,11 +20,13 @@
 	- cpu/eos_s3:         Add LiteX BIOS/Bare Metal software support.
 	- litex_sim:          Add .json support for --rom/ram/sdram-init.
 	- soc/add_uart:       Allow multiple UARTs in the same design.
+	- cores/cpu:          Add out-of-tree support.
 
     [> API changes/Deprecation
 	--------------------------
 	- Fully deprecate SoCSDRAM/SPIFlash core (replaced by LiteSPI).
 	- UART "bridge" name deprecated in favor of "crossover" (already supported).
+	- "external" CPU class support deprecated (replaced by out-of-tree support).
 
 [> 2021.12, released on January 5th 2022
 ----------------------------------------