From 68fe6a30fdc790e44e9f6a4228f73f3a38c6d372 Mon Sep 17 00:00:00 2001 From: Jevin Sweval Date: Mon, 23 May 2022 12:06:15 -0700 Subject: [PATCH] Intel Clocking: compute_config() fix indent causing PLL config error --- litex/soc/cores/clock/intel_common.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex/soc/cores/clock/intel_common.py b/litex/soc/cores/clock/intel_common.py index 6a0be5382..914d187d9 100644 --- a/litex/soc/cores/clock/intel_common.py +++ b/litex/soc/cores/clock/intel_common.py @@ -70,8 +70,8 @@ class IntelClocking(Module, AutoCSR): break if valid: break - if not valid: - all_valid = False + if not valid: + all_valid = False else: all_valid = False if all_valid: