From 4f471490a87921e6b1fb78f44da5db12a061fad6 Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 14:45:36 +0200 Subject: [PATCH 1/7] tools/litex_json2renode: Output silenced range start address as hex --- litex/tools/litex_json2renode.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index 259eea571..e7dfc8b0c 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -186,7 +186,7 @@ def generate_silencer(csr, name, **kwargs): return """ sysbus: init add: - SilenceRange <{} 0x200> # {} + SilenceRange <0x{:08x} 0x200> # {} """.format(csr['csr_bases'][name], name) From 212db12b1dfa0947b5b191f4500480d204e38c4c Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 15:03:51 +0200 Subject: [PATCH 2/7] tools/litex_json2renode: Skip braces on MappedMemory registration --- litex/tools/litex_json2renode.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index e7dfc8b0c..d14db3fdc 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -166,7 +166,7 @@ was {} bytes. {}: Memory.MappedMemory @ {} size: {} """.format(region_descriptor['name'], - generate_sysbus_registration(region_descriptor, skip_size=True), + generate_sysbus_registration(region_descriptor, skip_size=True, skip_braces=True), hex(region_descriptor['size'])) return result From dae22a0d9d4a593092af2a227b23339fa29b50ec Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 13:50:22 +0200 Subject: [PATCH 3/7] tools/litex_json2renode: Update PLIC interrupt configuration --- litex/tools/litex_json2renode.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index d14db3fdc..c23c09a3e 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -433,12 +433,12 @@ clint: IRQControllers.CoreLevelInterruptor @ {} def generate_plic(plic): - # TODO: this is configuration for VexRiscv - add support for other CPU types + # TODO: this is configuration for linux-on-litex-vexriscv - add support for other CPU types result = """ plic: IRQControllers.PlatformLevelInterruptController @ {} - [0-3] -> cpu@[8-11] + [0, 1] -> cpu@[11, 9] numberOfSources: 31 - numberOfTargets: 2 + numberOfContexts: 2 prioritiesEnabled: false """.format(generate_sysbus_registration(plic, skip_braces=True, From 124a2b2d566f0cf6e433f2ed60077ca56807c50f Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 15:59:41 +0200 Subject: [PATCH 4/7] tools/litex_json2renode: Don't disable built-in IRQ controller on vexriscv_smp The built-in IRQ controller is needed by linux-on-litex-vexriscv --- litex/tools/litex_json2renode.py | 5 ----- 1 file changed, 5 deletions(-) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index c23c09a3e..c30c90054 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -235,11 +235,6 @@ cpu: CPU.VexRiscv @ sysbus timeProvider: {} """.format(time_provider) - if kind == 'vexriscv_smp': - result += """ - builtInIrqController: false -""" - return result elif kind == 'picorv32': return """ From 98168492de8fcae74c43d0ea6de98bcf9b4d4dcc Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 15:22:46 +0200 Subject: [PATCH 5/7] tools/litex_json2renode: Save filtered memory regions for peripheral generators --- litex/tools/litex_json2renode.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index c30c90054..eb4a3b80c 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -562,7 +562,10 @@ def generate_repl(csr, etherbone_peripherals, autoalign): x['name'] = m memories.append(x) - for mem_region in filter_memory_regions(memories, alignment=0x1000, autoalign=autoalign): + filtered_memories = list(filter_memory_regions(memories, alignment=0x1000, autoalign=autoalign)) + csr['filtered_memories'] = filtered_memories # Save for use by peripheral generators + + for mem_region in filtered_memories: result += generate_memory_region(mem_region) time_provider = None From c149f3e4ddfd36410be9807ced73876e41adfa60 Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 15:57:40 +0200 Subject: [PATCH 6/7] tools/litex_json2renode: Add find_memory_region helper --- litex/tools/litex_json2renode.py | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index eb4a3b80c..1008366ef 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -667,6 +667,28 @@ def filter_memory_regions(raw_regions, alignment=None, autoalign=[]): yield r +def find_memory_region(memory_regions, address): + """ Finds the memory region containing the specified address. + + Args: + memory_regions (list): list of memory regions filtered + with filter_memory_regions + address (int): the address to find + + Returns: + dict or None: the region from `memory_regions` that contains + `address` or None if none of them do + """ + for r in memory_regions: + base, size = r['base'], r['size'] + end = base + size + + if base <= address < end: + return r + + return None + + def generate_resc(csr, args, flash_binaries={}, tftp_binaries={}): """ Generates platform definition. From 456822a5fa2680408e37978d01c6fb3a2851c86a Mon Sep 17 00:00:00 2001 From: Piotr Wojnarowski Date: Mon, 13 Jun 2022 13:31:08 +0200 Subject: [PATCH 7/7] tools/litex_json2renode: Add video_framebuffer support --- litex/tools/litex_json2renode.py | 41 ++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py index 1008366ef..8beda26fa 100755 --- a/litex/tools/litex_json2renode.py +++ b/litex/tools/litex_json2renode.py @@ -442,6 +442,41 @@ plic: IRQControllers.PlatformLevelInterruptController @ {} return result +def generate_video_framebuffer(csr, name, **kwargs): + peripheral = get_descriptor(csr, name, 0xc) # This is simultaneously the "dma" region + vtg = get_descriptor(csr, name + "_vtg", 0x24) + + constants = peripheral['constants'] + + hres = int(constants['hres']) + vres = int(constants['vres']) + base = int(constants['base']) + + memory = find_memory_region(csr['filtered_memories'], base) + if memory is None: + raise Exception("Framebuffer base does not belong to a memory region") + + offset = base - memory['base'] + + result = """ +litex_video: Video.LiteX_Framebuffer_CSR32 @ {{ + {}; + {} +}} + format: PixelFormat.XBGR8888 + memory: {} + offset: 0x{:08x} + hres: {} + vres: {} +""".format(generate_sysbus_registration(peripheral, + skip_braces=True, region='dma'), + generate_sysbus_registration(vtg, + skip_braces=True, region='vtg'), + memory['name'], offset, hres, vres) + + return result + + def get_clock_frequency(csr): """ Args: @@ -520,6 +555,12 @@ peripherals_handlers = { 'model': 'SPI.LiteX_SPI', 'ignored_constants': ['interrupt'] # model in Renode currently doesn't support interrupts }, + 'video_framebuffer': { + 'handler': generate_video_framebuffer, + }, + 'video_framebuffer_vtg': { + 'handler': lambda *args, **kwargs: "", # This is handled by generate_video_framebuffer + } }