From 6b91e8827c62a78d555d50e932de657e74e8fb1a Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 31 Dec 2019 09:58:26 +0100 Subject: [PATCH] soc/integration/builder: avoid try/except on LiteDRAM import, just check if SoC has an sdram and do the import if so --- litex/soc/integration/builder.py | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/litex/soc/integration/builder.py b/litex/soc/integration/builder.py index 665528a80..49951d986 100644 --- a/litex/soc/integration/builder.py +++ b/litex/soc/integration/builder.py @@ -16,15 +16,6 @@ import shutil from litex.build.tools import write_to_file from litex.soc.integration import cpu_interface, soc_core -try: - from litex.soc.integration import soc_sdram - from litedram.init import get_sdram_phy_c_header -except ImportError: - class soc_sdram: - class SoCSDRAM: - pass - - __all__ = ["soc_software_packages", "soc_directory", "Builder", "builder_args", "builder_argdict"] @@ -127,13 +118,12 @@ class Builder: cpu_interface.get_git_header() ) - if isinstance(self.soc, soc_sdram.SoCSDRAM): - if hasattr(self.soc, "sdram"): - write_to_file( - os.path.join(generated_dir, "sdram_phy.h"), - get_sdram_phy_c_header( - self.soc.sdram.controller.settings.phy, - self.soc.sdram.controller.settings.timing)) + if hasattr(self.soc, "sdram"): + from litedram.init import get_sdram_phy_c_header + write_to_file(os.path.join(generated_dir, "sdram_phy.h"), + get_sdram_phy_c_header( + self.soc.sdram.controller.settings.phy, + self.soc.sdram.controller.settings.timing)) def _generate_csr_map(self, csr_json=None, csr_csv=None): if csr_json is not None: