From 6bc9265c2bf38143a9ce3ddee2fd786a914a79a2 Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Fri, 6 Jul 2018 16:09:38 +0800 Subject: [PATCH] setup: add vexriscv_debug to list of entrypoints Add the vexriscv_debug program to the list of scripts created when installing this module. This program is a simple bridge that allows openocd to talk to the vexriscv core so it can be debugged. Signed-off-by: Sean Cross --- litex/soc/tools/vexriscv_debug.py | 4 ---- setup.py | 3 ++- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/litex/soc/tools/vexriscv_debug.py b/litex/soc/tools/vexriscv_debug.py index 67b6b09eb..cb5038330 100644 --- a/litex/soc/tools/vexriscv_debug.py +++ b/litex/soc/tools/vexriscv_debug.py @@ -44,9 +44,6 @@ class VexRiscvDebugBridge(): parser.add_argument("--csr", default="test/csr.csv", help="csr mapping file") self.args = parser.parse_args() - def temperature(self): - return self.rc.read(self.rc.regs.xadc_temperature.addr) * 503.975 / 4096 - 273.15 - def accept(self): if hasattr(self, "debugger"): return @@ -85,7 +82,6 @@ class VexRiscvDebugBridge(): def main(): vrvb = VexRiscvDebugBridge() vrvb.open() - print("FPGA Temperature: {} C".format(vrvb.temperature())) while True: vrvb.accept() diff --git a/setup.py b/setup.py index bd78a9db9..30a2e42f6 100755 --- a/setup.py +++ b/setup.py @@ -38,7 +38,8 @@ setup( "console_scripts": [ "litex_term=litex.soc.tools.litex_term:main", "mkmscimg=litex.soc.tools.mkmscimg:main", - "litex_server=litex.soc.tools.remote.litex_server:main" + "litex_server=litex.soc.tools.remote.litex_server:main", + "vexriscv_bridge=litex.soc.tools.vexriscv_debug:main" ], }, )