From 6d9cacd465c50d3753d5bdeefb9e9097357e7aec Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Tue, 14 Nov 2023 13:45:01 +0100 Subject: [PATCH] core/NaxRiscv update (timing improvements) --- litex/soc/cores/cpu/naxriscv/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/cores/cpu/naxriscv/core.py b/litex/soc/cores/cpu/naxriscv/core.py index c9f010ccc..294974b2e 100755 --- a/litex/soc/cores/cpu/naxriscv/core.py +++ b/litex/soc/cores/cpu/naxriscv/core.py @@ -315,7 +315,7 @@ class NaxRiscv(CPU): sdir = os.path.join(vdir, "ext", "SpinalHDL") if NaxRiscv.update_repo != "no": - NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git", "main", "b6d0712f" if NaxRiscv.update_repo=="recommended" else None) + NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git", "main", "ec3ee4dc" if NaxRiscv.update_repo=="recommended" else None) gen_args = [] gen_args.append(f"--netlist-name={NaxRiscv.netlist_name}")