From 7d1c9a9001ed253c3f85c4327f20a476833377e8 Mon Sep 17 00:00:00 2001 From: Jevin Sweval Date: Sat, 21 May 2022 16:20:13 -0700 Subject: [PATCH] AlteraAsyncResetSynchronizer: prettify instance names This makes debugging e.g. conflicting drivers easier since the errors will display the clock domain name. --- litex/build/altera/common.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/litex/build/altera/common.py b/litex/build/altera/common.py index 1c53d8645..3ed0947ba 100644 --- a/litex/build/altera/common.py +++ b/litex/build/altera/common.py @@ -25,16 +25,16 @@ altera_reserved_jtag_pads = [ class AlteraAsyncResetSynchronizerImpl(Module): def __init__(self, cd, async_reset): - rst_meta = Signal() + rst_meta = Signal(name_override=f'ars_cd_{cd.name}_rst_meta') self.specials += [ - Instance("DFF", + Instance("DFF", name=f'ars_cd_{cd.name}_ff0', i_d = 0, i_clk = cd.clk, i_clrn = 1, i_prn = ~async_reset, o_q = rst_meta ), - Instance("DFF", + Instance("DFF", name=f'ars_cd_{cd.name}_ff1', i_d = rst_meta, i_clk = cd.clk, i_clrn = 1,