From 6fcbf10eb9b0be18d5bd08bdad1d55c3ccc9a3f8 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 7 May 2019 12:48:36 +0200 Subject: [PATCH] boards/plarforms/minispartan6: default to xc6slx25 --- litex/boards/platforms/minispartan6.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/boards/platforms/minispartan6.py b/litex/boards/platforms/minispartan6.py index e0fc4af2c..c32b72eee 100644 --- a/litex/boards/platforms/minispartan6.py +++ b/litex/boards/platforms/minispartan6.py @@ -117,7 +117,7 @@ class Platform(XilinxPlatform): default_clk_name = "clk32" default_clk_period = 31.25 - def __init__(self, device="xc6slx9"): + def __init__(self, device="xc6slx25"): XilinxPlatform.__init__(self, device+"-3-ftg256", _io, _connectors) def create_programmer(self):