From 610bfe4d0c52cd84159c1b4a267560c3c0ca550e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 26 Mar 2021 15:05:33 +0100 Subject: [PATCH 1/4] tools/litex_json2dts: Fix DTS indentation - Replace bogus TAB by spaces, - Drop spaces from empty lines. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index e95fe95b6..c7122de03 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -87,7 +87,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): }}; """.format(cpu=cpu, irq=cpu, sys_clk_freq=d["constants"]["config_clock_frequency"], cpu_isa=d["constants"]["cpu_isa"]) dts += """ - }; + }; """ # mor1kx @@ -163,7 +163,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): {cpu_mapping}>; riscv,ndev = <32>; }}; - """.format( +""".format( plic_base =d["memories"]["plic"]["base"], cpu_mapping =("\n" + " "*20).join(["&L{} 11 &L{} 9".format(cpu, cpu) for cpu in cpus])) @@ -275,7 +275,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): bus-width = <0x04>; status = "okay"; }}; - """.format( +""".format( mmc_csr_base = d["csr_bases"]["sdphy"], sdphy_csr_base = d["csr_bases"]["sdphy"], sdcore_csr_base = d["csr_bases"]["sdcore"], From bcef9a68caeea1d6ccaada6a0264bdbaecc5708e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 26 Mar 2021 15:08:36 +0100 Subject: [PATCH 2/4] tools/litex_json2dts: Fix plic node interrupt-controller@f0c00000: compatible:0: 'sifive,plic-1.0.0' is not one of ['sifive,fu540-c000-plic', 'canaan,k210-plic'] From schema: Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml interrupt-controller@f0c00000: compatible:1: 'sifive,plic-1.0.0' was expected From schema: Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml interrupt-controller@f0c00000: '#address-cells' is a required property From schema: Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml Fix this by correcting the order of the compatible values, and adding the missing #address-cells property. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index c7122de03..2e0769296 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -155,8 +155,9 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): if cpu_name == "vexriscv smp-linux": dts += """ intc0: interrupt-controller@{plic_base:x} {{ - compatible = "sifive,plic-1.0.0", "sifive,fu540-c000-plic"; + compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x{plic_base:x} 0x400000>; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; interrupts-extended = < From 54d2578f04dcf1b6fe5c004f37ad6307c3e10ce8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 26 Mar 2021 15:21:54 +0100 Subject: [PATCH 3/4] tools/litex_json2dts: Fix liteuart node serial@f0001000: 'device_type' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/serial/litex,liteuart.yaml Fix this by dropping the offending property. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 1 - 1 file changed, 1 deletion(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index 2e0769296..79e51a6f3 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -183,7 +183,6 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): aliases["serial0"] = "liteuart0" dts += """ liteuart0: serial@{uart_csr_base:x} {{ - device_type = "serial"; compatible = "litex,liteuart"; reg = <0x{uart_csr_base:x} 0x100>; {uart_interrupt} From a7a70fa2f0464159781c87dd97f77900fa4de002 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 26 Mar 2021 15:36:30 +0100 Subject: [PATCH 4/4] tools/litex_json2dts: Fix mmc node mmc@f0006800:reg:0: [4026558464, 256, 4026560512, 256, 4026562560, 256, 4026564608, 256] is too long From schema: dt-schema/dtschema/schemas/simple-bus.yaml mmc@f0006800:reg:0: [4026558464, 256, 4026560512, 256, 4026562560, 256, 4026564608, 256] is too long From schema: dt-schema/dtschema/schemas/reg.yaml Fix this by grouping the tuples in the "reg" property using angle brackets. Signed-off-by: Geert Uytterhoeven --- litex/tools/litex_json2dts.py | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index 79e51a6f3..4248837c9 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -267,11 +267,10 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): dts += """ mmc0: mmc@{mmc_csr_base:x} {{ compatible = "litex,mmc"; - reg = < - 0x{sdphy_csr_base:x} 0x100 - 0x{sdcore_csr_base:x} 0x100 - 0x{sdblock2mem:x} 0x100 - 0x{sdmem2block:x} 0x100>; + reg = <0x{sdphy_csr_base:x} 0x100>, + <0x{sdcore_csr_base:x} 0x100>, + <0x{sdblock2mem:x} 0x100>, + <0x{sdmem2block:x} 0x100>; bus-width = <0x04>; status = "okay"; }};