From 7582b76406fdf36d391aea254a1a0d9b1ee3b2d6 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 11 Dec 2011 20:15:30 +0100 Subject: [PATCH] bank: fix csrgen address decoder --- migen/bank/csrgen.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/bank/csrgen.py b/migen/bank/csrgen.py index e605415b1..460966b46 100644 --- a/migen/bank/csrgen.py +++ b/migen/bank/csrgen.py @@ -16,7 +16,7 @@ class Bank: comb = [] sync = [] - comb.append(a(self._sel, self.interface.a_i[12:] == f.Constant(self.address, f.BV(4)))) + comb.append(a(self._sel, self.interface.a_i[10:] == f.Constant(self.address, f.BV(4)))) nregs = len(self.description) nbits = f.BitsFor(nregs-1)