From 7649028bdc6a14f71dc7f4d172ddf38ca538cebe Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Mon, 24 Mar 2014 09:32:26 -0600 Subject: [PATCH] test/support: fix default ncycles --- migen/test/support.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/test/support.py b/migen/test/support.py index 394cc424d..51a897079 100644 --- a/migen/test/support.py +++ b/migen/test/support.py @@ -17,6 +17,6 @@ class SimCase: def test_to_verilog(self): verilog.convert(self.tb) - def run_with(self, cb, ncycles=-1): + def run_with(self, cb, ncycles=None): self.tb.callback = cb run_simulation(self.tb, ncycles=ncycles)