From 7c99e51b907e76553b1474d18a4434c5e1950fd7 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Thu, 8 Dec 2011 19:16:08 +0100 Subject: [PATCH] Named buses --- migen/bus/csr.py | 8 ++++---- migen/bus/simple.py | 6 ++++-- migen/bus/wishbone.py | 8 ++++---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/migen/bus/csr.py b/migen/bus/csr.py index f4fdcad0a..297bd4e4f 100644 --- a/migen/bus/csr.py +++ b/migen/bus/csr.py @@ -9,12 +9,12 @@ _desc = [ ] class Master(Simple): - def __init__(self): - Simple.__init__(self, _desc, False) + def __init__(self, name=""): + Simple.__init__(self, _desc, False, name) class Slave(Simple): - def __init__(self): - Simple.__init__(self, _desc, True) + def __init__(self, name=""): + Simple.__init__(self, _desc, True, name) class Interconnect: def __init__(self, master, slaves): diff --git a/migen/bus/simple.py b/migen/bus/simple.py index 8ca279922..fdf3fb714 100644 --- a/migen/bus/simple.py +++ b/migen/bus/simple.py @@ -5,7 +5,7 @@ from migen.fhdl import structure as f # 1) string: name # 2) int: width class Simple(): - def __init__(self, desc, slave): + def __init__(self, desc, slave, name): for signal in desc: if signal[0] ^ slave: suffix = "_o" @@ -13,5 +13,7 @@ class Simple(): suffix = "_i" modules = self.__module__.split('.') busname = modules[len(modules)-1] + if name: + busname += "_" + name signame = signal[1]+suffix - setattr(self, signame, f.Signal(f.BV(signal[2]), busname+"_"+signame)) + setattr(self, signame, f.Signal(f.BV(signal[2]), busname + "_" + signame)) diff --git a/migen/bus/wishbone.py b/migen/bus/wishbone.py index 05deddee8..b92d5c599 100644 --- a/migen/bus/wishbone.py +++ b/migen/bus/wishbone.py @@ -16,9 +16,9 @@ _desc = [ ] class Master(Simple): - def __init__(self): - Simple.__init__(self, _desc, False) + def __init__(self, name=""): + Simple.__init__(self, _desc, False, name) class Slave(Simple): - def __init__(self): - Simple.__init__(self, _desc, True) + def __init__(self, name=""): + Simple.__init__(self, _desc, True, name)