diff --git a/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py b/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py
index 29d22bf30..19f3e7984 100644
--- a/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py
+++ b/litex/soc/interconnect/avalon/avalon_mm_to_wishbone.py
@@ -55,7 +55,6 @@ class AvalonMM2Wishbone(Module):
         self.comb += [
             avl.waitrequest.eq(~(wb.ack | wb.err) | burst_read),
             avl.readdata.eq(readdata),
-            avl.readdatavalid.eq(readdatavalid),
         ]
 
         # Avalon -> Wishbone
@@ -75,6 +74,7 @@ class AvalonMM2Wishbone(Module):
         self.submodules.fsm = fsm = FSM(reset_state="SINGLE")
         fsm.act("SINGLE",
             burst_cycle.eq(0),
+            avl.readdatavalid.eq(readdatavalid),
             wb.sel.eq(avl.byteenable),
             wb.cti.eq(wishbone.CTI_BURST_NONE),
             If(avl.burstcount > 1,
@@ -93,6 +93,7 @@ class AvalonMM2Wishbone(Module):
             )
         )
         fsm.act("BURST-WRITE",
+            avl.readdatavalid.eq(0),
             burst_cycle.eq(1),
             wb.sel.eq(avl.byteenable),
             wb.cti.eq(wishbone.CTI_BURST_INCREMENTING),
@@ -109,6 +110,7 @@ class AvalonMM2Wishbone(Module):
             )
         )
         fsm.act("BURST-READ",
+            avl.readdatavalid.eq(0),
             burst_cycle.eq(1),
             burst_read.eq(1),
             wb.stb.eq(1),
diff --git a/test/test_avalon_mm.py b/test/test_avalon_mm.py
index 87723a8e7..a311efc26 100644
--- a/test/test_avalon_mm.py
+++ b/test/test_avalon_mm.py
@@ -44,9 +44,13 @@ class TestAvalon2Wishbone(unittest.TestCase):
             yield from dut.avl.bus_write(0x0, [0x01234567, 0x89abcdef, 0xdeadbeef, 0xc0ffee00, 0x76543210])
             yield
             self.assertEqual((yield from dut.avl.bus_read(0x0000, burstcount=5)), 0x01234567)
+            self.assertEqual((yield dut.avl.readdatavalid), 1)
             self.assertEqual((yield from dut.avl.continue_read_burst()), 0x89abcdef)
+            self.assertEqual((yield dut.avl.readdatavalid), 1)
             self.assertEqual((yield from dut.avl.continue_read_burst()), 0xdeadbeef)
+            self.assertEqual((yield dut.avl.readdatavalid), 1)
             self.assertEqual((yield from dut.avl.continue_read_burst()), 0xc0ffee00)
+            self.assertEqual((yield dut.avl.readdatavalid), 1)
             self.assertEqual((yield from dut.avl.continue_read_burst()), 0x76543210)
             yield
             yield