From 8066a9e265a84296d849fb302be7818adcb7297f Mon Sep 17 00:00:00 2001
From: Andrew Dennison <andrew@motec.com.au>
Date: Fri, 12 May 2023 13:19:29 +1000
Subject: [PATCH] efinix/dbparser: support more Titanium pll_in pins

* Veridied to fix using A11 on Ti60F255. Without this the wrong GPIO was silently used
* Seems to correctly select PLL_IN clock for these Ti60F255 pins:
** H6, B2, C5, E6, A11, C14, L11, R13, P11, R5, A2
---
 litex/build/efinix/dbparser.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/litex/build/efinix/dbparser.py b/litex/build/efinix/dbparser.py
index 2e06a8638..1fa882036 100644
--- a/litex/build/efinix/dbparser.py
+++ b/litex/build/efinix/dbparser.py
@@ -112,7 +112,7 @@ class EfinixDbParser:
                         if i == None:
                             continue
                         if (i == inst) or (inst + '.' in i):
-                            refclk_no = 0
+                            refclk_no = 0 if self.device[:2] != "Ti" else c.get('index')
                             if c.get('index') == '3':
                                 refclk_no = 1
                             return (p.get('name'), refclk_no)