From 837de615e6bd4ae3105472f3ee6c1feca02a78f2 Mon Sep 17 00:00:00 2001 From: Pawel Sagan Date: Tue, 31 Aug 2021 16:39:34 +0200 Subject: [PATCH] =?UTF-8?q?liblitespi:=20adjusting=20code=20to=20oddr/iddr?= =?UTF-8?q?=20litespi=20implementation=20Changing=20litespi=20registers=20?= =?UTF-8?q?configuration=20to=20be=20compatible=20with=20a=20new=20impleme?= =?UTF-8?q?ntation.=20Signed-off-by:=20Pawe=C5=82=20Sagan=20?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- litex/soc/integration/soc.py | 13 +++++++++---- litex/soc/software/liblitespi/spiflash.c | 23 ++++------------------- 2 files changed, 13 insertions(+), 23 deletions(-) diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index 3205628e8..a73e21be1 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -1491,7 +1491,7 @@ class LiteXSoC(SoC): self.platform.add_false_path_constraints(self.crg.cd_sys.clk, eth_rx_clk, eth_tx_clk) # Add SPI Flash -------------------------------------------------------------------------------- - def add_spi_flash(self, name="spiflash", mode="4x", dummy_cycles=None, clk_freq=None, module=None, **kwargs): + def add_spi_flash(self, name="spiflash", mode="4x", dummy_cycles=None, clk_freq=None, module=None, init=None, clock_domain="sys", **kwargs): if module is None: # Use previous LiteX SPI Flash core with compat, will be deprecated at some point. from litex.compat.soc_add_spi_flash import add_spi_flash @@ -1499,7 +1499,6 @@ class LiteXSoC(SoC): # LiteSPI. else: # Imports. - from litespi.phy.generic import LiteSPIPHY from litespi import LiteSPI from litespi.opcodes import SpiNorFlashOpCodes @@ -1511,14 +1510,20 @@ class LiteXSoC(SoC): self.check_if_exists(name + "_phy") self.check_if_exists(name + "_mmap") spiflash_pads = self.platform.request(name if mode == "1x" else name + mode) - spiflash_phy = LiteSPIPHY(spiflash_pads, module, device=self.platform.device, default_divisor=int(self.sys_clk_freq/clk_freq)) - spiflash_core = LiteSPI(spiflash_phy, clk_freq=clk_freq, mmap_endianness=self.cpu.endianness, **kwargs) + if init is None: + from litespi.phy.generic import LiteSPIPHY + spiflash_phy = LiteSPIPHY(spiflash_pads, module, clock_domain=clock_domain, device=self.platform.device,) + else: + from litespi.phy.model import LiteSPIPHYModel + spiflash_phy = LiteSPIPHYModel(module, init=init, clock_domain=clock_domain) + spiflash_core = LiteSPI(spiflash_phy, clock_domain=clock_domain, mmap_endianness=self.cpu.endianness, **kwargs) setattr(self.submodules, name + "_phy", spiflash_phy) setattr(self.submodules, name + "_core", spiflash_core) spiflash_region = SoCRegion(origin=self.mem_map.get(name, None), size=module.total_size) self.bus.add_slave(name=name, slave=spiflash_core.bus, region=spiflash_region) # Constants. + self.add_constant("SPIFLASH_FREQUENCY", clk_freq) self.add_constant("SPIFLASH_MODULE_NAME", module.name.upper()) self.add_constant("SPIFLASH_MODULE_TOTAL_SIZE", module.total_size) self.add_constant("SPIFLASH_MODULE_PAGE_SIZE", module.page_size) diff --git a/litex/soc/software/liblitespi/spiflash.c b/litex/soc/software/liblitespi/spiflash.c index 26ea525aa..80ea8f752 100644 --- a/litex/soc/software/liblitespi/spiflash.c +++ b/litex/soc/software/liblitespi/spiflash.c @@ -13,14 +13,13 @@ #include "spiflash.h" -#if defined(CSR_SPIFLASH_PHY_BASE) && defined(CSR_SPIFLASH_CORE_BASE) +#if defined(CSR_SPIFLASH_CORE_BASE) //#define SPIFLASH_DEBUG //#define SPIFLASH_MODULE_DUMMY_BITS 8 int spiflash_freq_init(void) { - unsigned int lowest_div = spiflash_phy_clk_divisor_read(); unsigned int crc = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE); unsigned int crc_test = crc; @@ -34,26 +33,14 @@ int spiflash_freq_init(void) return -1; } - while((crc == crc_test) && (lowest_div-- > 0)) { - spiflash_phy_clk_divisor_write((uint32_t)lowest_div); - crc_test = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE); -#if SPIFLASH_DEBUG - printf("[DIV: %d] %08x\n\r", lowest_div, crc_test); -#endif - } - lowest_div++; - printf("SPI Flash clk configured to %d MHz\n", (spiflash_core_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000); - - spiflash_phy_clk_divisor_write(lowest_div); - + printf("SPI Flash clk configured to %ld MHz\n", (unsigned long)(spiflash_frequency_read()/1e6)); return 0; } - void spiflash_dummy_bits_setup(unsigned int dummy_bits) { - spiflash_phy_dummy_bits_write((uint32_t)dummy_bits); + spiflash_core_mmap_dummy_bits_write((uint32_t)dummy_bits); #if SPIFLASH_DEBUG - printf("Dummy bits set to: %d\n\r", spi_dummy_bits_read()); + printf("Dummy bits set to: %d\n\r", spiflash_core_mmap_dummy_bits_read()); #endif } @@ -111,8 +98,6 @@ void spiflash_init(void) #ifndef SPIFLASH_SKIP_FREQ_INIT /* Clk frequency auto-calibration. */ spiflash_freq_init(); -#else - printf("Warning: SPI Flash frequency auto-calibration skipped, using the default divisor of %d\n", spiflash_phy_clk_divisor_read()); #endif memspeed((unsigned int *) SPIFLASH_BASE, SPIFLASH_SIZE/16, 1, 0);