diff --git a/miscope/host/uart2wishbone.py b/miscope/host/uart2wishbone.py
index df79a1a12..ebed06149 100644
--- a/miscope/host/uart2wishbone.py
+++ b/miscope/host/uart2wishbone.py
@@ -10,9 +10,9 @@ def write_b(uart, data):
 class Uart2Wishbone:
 	WRITE_CMD  = 0x01
 	READ_CMD   = 0x02
-	def __init__(self, port, baudrate, addrmap=None, debug=False):
+	def __init__(self, port, baudrate=115200, addrmap=None, debug=False):
 		self.port = port
-		self.baudrate = baudrate
+		self.baudrate = str(baudrate)
 		self.debug = debug
 		self.uart = serial.Serial(port, baudrate, timeout=0.25)
 		self.regs = build_map(addrmap, self.read, self.write)
diff --git a/miscope/uart2wishbone.py b/miscope/uart2wishbone.py
index 4fce77385..b6665e87c 100644
--- a/miscope/uart2wishbone.py
+++ b/miscope/uart2wishbone.py
@@ -161,7 +161,7 @@ class UARTMux(Module):
 class UART2Wishbone(Module, AutoCSR):
 	WRITE_CMD = 0x01
 	READ_CMD = 0x02
-	def __init__(self, pads, clk_freq, baud, share_uart=False):
+	def __init__(self, pads, clk_freq, baud=115200, share_uart=False):
 		
 		# Wishbone interface
 		self.wishbone = wishbone.Interface()