diff --git a/litex/build/osfpga/osfpga.py b/litex/build/osfpga/osfpga.py
index c0a4e5419..7700ecce5 100644
--- a/litex/build/osfpga/osfpga.py
+++ b/litex/build/osfpga/osfpga.py
@@ -33,9 +33,7 @@ def _build_tcl(name, device, files, build_name, include_paths):
     tcl.append(f"create_design {build_name}")
 
     # Set Device.
-    # FIXME: Directly pass Devices instead of Macro when possible.
-    macro = {"test": "P1=10  P2=20"}[device]
-    tcl.append(f"set_macro {macro}")
+    tcl.append(f"target_device {device.upper()}")
 
     # Add Include Path.
     tcl.append("add_include_path ./")
diff --git a/litex/build/osfpga/test_soc.py b/litex/build/osfpga/test_soc.py
index 3c5fd4822..4429a0af4 100755
--- a/litex/build/osfpga/test_soc.py
+++ b/litex/build/osfpga/test_soc.py
@@ -29,8 +29,8 @@ _io = [
 ]
 
 class Platform(OSFPGAPlatform):
-    def __init__(self, toolchain="foedag"):
-        OSFPGAPlatform.__init__(self, device="test", toolchain=toolchain, io=_io)
+    def __init__(self, toolchain="foedag", device="mpw1"):
+        OSFPGAPlatform.__init__(self, device=device, toolchain=toolchain, io=_io)
 
 # BaseSoC ------------------------------------------------------------------------------------------
 
@@ -50,11 +50,12 @@ def main():
     target_group = parser.add_argument_group(title="Target options")
     target_group.add_argument("--build",     action="store_true", help="Build design.")
     target_group.add_argument("--toolchain", default="foedag",    help="FPGA toolchain.")
+    target_group.add_argument("--device",    default="mpw1",      help="FPGA device.")
     builder_args(parser)
     soc_core_args(parser)
     args = parser.parse_args()
 
-    platform = Platform(toolchain=args.toolchain)
+    platform = Platform(toolchain=args.toolchain, device=args.device)
     soc      = BaseSoC(platform,**soc_core_argdict(args))
     builder  = Builder(soc, **builder_argdict(args))
     if args.build: