diff --git a/misoclib/gensoc/__init__.py b/misoclib/gensoc/__init__.py
index fe1235c08..a9885e4d3 100644
--- a/misoclib/gensoc/__init__.py
+++ b/misoclib/gensoc/__init__.py
@@ -245,7 +245,7 @@ class SDRAMSoC(GenSoC):
 
 		# MINICON
 		elif self.ramcon_type == "minicon":
-			if with_l2:
+			if self.with_l2:
 				raise ValueError("MINICON does not implement L2 cache (Use LASMICON)")
 
 			self.submodules.minicon = sdramcon = Minicon(phy_settings, sdram_geom, sdram_timing)