From 8ee0fdbf8ec236209c732c162d90e6600409edea Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Thu, 10 Dec 2020 22:48:09 +0800
Subject: [PATCH] fix a timing error in the S7 OPI block

should have no impact on normal operation, the path is
only for registering addresses that are correlated with
ECC errors as reported by the OPI device.
---
 litex/soc/cores/spi_opi.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/litex/soc/cores/spi_opi.py b/litex/soc/cores/spi_opi.py
index 60e9c9a97..d32d8dcf5 100644
--- a/litex/soc/cores/spi_opi.py
+++ b/litex/soc/cores/spi_opi.py
@@ -1393,7 +1393,7 @@ class S7SPIOPI(Module, AutoCSR, AutoDoc):
         ])
 
         self.comb += self.ecc_status.fields.ecc_error.eq(ecs_n)
-        self.comb += [
+        self.sync += [
             ecs_pulse.eq(ecs_n_delay & ~ecs_n), # falling edge -> positive pulse
             If(ecs_pulse,
                self.ecc_address.fields.ecc_address.eq(rom_addr),