From 90315868a8925e13990de602601f07532fc2db86 Mon Sep 17 00:00:00 2001 From: David Shah Date: Thu, 3 Dec 2020 11:49:48 +0000 Subject: [PATCH] clock/lattice_nx: Set PLLRESET_ENA parameter If this parameter isn't set to ENABLED; then the PLLRESET signal is ignored. Signed-off-by: David Shah --- litex/soc/cores/clock/lattice_nx.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex/soc/cores/clock/lattice_nx.py b/litex/soc/cores/clock/lattice_nx.py index 0460688e7..779705511 100644 --- a/litex/soc/cores/clock/lattice_nx.py +++ b/litex/soc/cores/clock/lattice_nx.py @@ -215,6 +215,7 @@ class NXPLL(Module): p_KP_VCO = "0b00011", # if (VOLTAGE == 0.9V) 0b11001 else 0b00011 p_PLLPD_N = "USED", + p_PLLRESET_ENA = "ENABLED", p_REF_INTEGER_MODE = "ENABLED", # Ref manual has a discrepency so lets always set this value just in case p_REF_MMD_DIG = "1", # Divider for the input clock, ie 'M'