diff --git a/migen/genlib/fifo.py b/migen/genlib/fifo.py
index d3958e87f..12b8033df 100644
--- a/migen/genlib/fifo.py
+++ b/migen/genlib/fifo.py
@@ -126,7 +126,7 @@ class AsyncFIFO(Module, _FIFOInterface):
 		rdport = storage.get_port(clock_domain="read")
 		self.specials += rdport
 		self.comb += [
-			rdport.adr.eq(consume.q_binary[:-1]),
+			rdport.adr.eq(consume.q_next_binary[:-1]),
 			self.dout_bits.eq(rdport.dat_r)
 		]