From 91fbc79ac2e0af4e9edf3a3fe423f98fb7bdeffb Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael@enjoy-digital.fr>
Date: Mon, 8 Jan 2024 07:28:56 +0100
Subject: [PATCH] build/gowin/common: adding missing TX/Q1 ODDR signals

---
 litex/build/gowin/common.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/litex/build/gowin/common.py b/litex/build/gowin/common.py
index fd554e946..1869385af 100644
--- a/litex/build/gowin/common.py
+++ b/litex/build/gowin/common.py
@@ -7,6 +7,8 @@
 from migen.fhdl.module import Module
 from migen.genlib.resetsync import AsyncResetSynchronizer
 
+from litex.gen import *
+
 from litex.build.io import *
 
 # Gowin AsyncResetSynchronizer ---------------------------------------------------------------------
@@ -58,7 +60,9 @@ class GowinDDROutputImpl(Module):
             i_CLK = clk,
             i_D0  = i1,
             i_D1  = i2,
+            i_TX  = 0,
             o_Q0  = o,
+            o_Q1  = Open(),
         )
 
 class GowinDDROutput: